PCB design: What is the method of inductance and capacitance value when filtering?
1. What is the method of selecting inductance and capacitance value when filtering?
The selection of inductance value shall consider not only the noise frequency to be filtered, but also the reaction ability of instantaneous current. If the output end of the LC has the opportunity to output a large current instantaneously, the inductance value is too large to hinder the speed of this large current flowing through the inductor, increasing ripple noise.
The capacitance value is related to the ripple noise specifICation value that can be tolerated. The SMAller the ripple noise value is required, the larger the capacitance value will be. The capacitor ESR/ESL will also have an impact. In addition, if the LC is placed at the output end of the switching power supply, pay attention to the influence of the pole zero point generated by the LC on the stability of the negative feedback control loop.
2. The filter at the analog power supply is often a LC circuit. But why is LC filtering worse than RC filtering sometimes?
The comparison of LC and RC filtering effects must consider whether the frequency band to be filtered and the inductance value are properly selected. Because the inductance is related to the inductance value and frequency. If the noise frequency of the power supply is low and the inductance value is not large enough, the filtering effect may not be as good as RC. However, the cost of using RC filtering is that the resistor itself will consume energy, and the efficiency is poor. In addition, attention should be paid to the power that the selected resistor can withstand.
3. When the size of the circuit board is fixed, if more functions need to be included in the design, it is often necessary to increase the wiring density of the PCB, but this may lead to increased mutual interference of the wiring, and at the same time, too thin wiring will not reduce the impedance. Please introduce the skills in high-speed (>100MHz) high-density PCB design?
When designing high-speed and high-density PCBs, we should pay special attention to crosstalk because it has a great impact on timing and signal integrity.
The following points should be noted:
1). Control the continuity and matching of the characteristic impedance of the wiring.
2). The size of the wire spacing. Generally, the spacing is twice the line width. Through SIMulation, we can know the influence of routing distance on timing and signal integrity, and find out the minimum tolerable distance. Different chip signals may have different results.
3). Select the appropriate termination method.
4). Avoid that the routing directions of the two adjacent layers are the same, or even that some lines overlap each other, because the crosstalk is greater than that of adjacent lines in the same layer.
5). Use blind/buried via to increase the routing area. However, the production cost of PCB will increase.
It is really difficult to achieve full parallelism and equal length in actual implementation, but we should try our best to do so. In addition, differential termination and common mode termination can be reserved to mitigate the impact on timing and signal integrity.
4. How to meet EMC requirements as much as possible without causing too much cost pressure?
The increased cost of EMC on PCB is usually due to the increase of the number of layers to enhance the shielding effect and the addition of high-frequency harmonic suppression devices such as ferrite bead and choke.
In addition, the shielding structure of other institutions is usually required to make the whole system pass the EMC requirements. Here are just a few ways to reduce the electromagnetic radiation effect generated by the circuit in terms of PCB design skills.
Several Reducing Electromagnetic Radiation Effects Generated by Circuits
1) Devices with slow signal slope rate shall be selected as far as possible to reduce the high-frequency components generated by the signal.
2) Pay attention to the placement of high-frequency components, and do not be too close to external connectors.
3) Pay attention to the impedance matching of high-speed signals, the routing layer and its return current path to reduce high-frequency reflection and radiation.
4) Place enough and appropriate decoupling capacitors on the power pins of each device to mitigate the noise on the power layer and stratum. Pay special attention to whether the frequency response and temperature characteristics of the capacitor meet the design requirements. 5) The ground near the external connector can be properly separated from the stratum, and the ground near the connector can be connected to the chassis ground.
6) The ground guard/hunt traces can be properly used beside some signals with high speed. However, we should pay attention to the influence of guard/hunt traces on the characteristic impedance of the wiring.
7) . The power layer shrinks 20H from the stratum, and H is the distance between the power layer and the stratum.
5. How to consider impedance matching when designing high-speed PCB design schematics?
When designing high-speed PCB circuits, impedance matching is one of the elements of design. The impedance value has an absolute relationship with the routing method. For example, when walking on the surface layer (microstrip) or the inner layer (stripe/double stripe), the distance from the reference layer (power layer or stratum), the routing width, PCB material, etc. will affect the characteristic impedance value of the routing.
6. When designing high-Speed PCB, what aspects should designers consider the rules of EMC and EMI?
Generally, radiation and conducted shall be considered simultaneously in EMI/EMC design The former belongs to the part with higher frequency (>30MHz) and the latter belongs to the part with lower frequency (<30MHz) Therefore, we cannot only pay attention to the high frequency and ignore the low frequency.
7. Where can we provide a more accurate IBIS model base?
The accuracy of IBIS model directly affects the simulation results. Basically IBIS can be regarded as the electrical characteristics data of the actual chip I/O buffer equivalent circuit, which can generally be converted from the SPICE model. The SPICE data has an absolute relationship with the Chip Manufacturing, so the SPICE data of the same device provided by different chip manufacturers are different, and the data in the converted IBIS model will also vary accordingly.
That is to say, if manufacturer A's devices are used, only they can provide accurate model data of their devices, because no one knows better than them what process their devices are made by. If the IBIS provided by the manufacturer is inaccurate, the fundamental solution is to constantly require the manufacturer to improve.
8. How to select EDA tools?
In the current pcb design software, thermal analysis is not a strong point, so it is not recommended to use it. Other functions 1.3.4 can choose PADS or CADence with good performance price ratio. Beginners of PLD design can use the integrated environment provided by PLD chip manufacturers, and can choose a single point tool when designing millions of gates or more.
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